Modern data networks, for example, computer networks, use variable sized, asynchronous, connectionless, packet switching mechanisms to transport data, e.g., in the form of data packets, among various network elements, also referred to as “nodes”.
A packet switching device (“switch”) employed in such networks includes a plurality of input ports to receive data packets from a plurality of “source” network elements, and a plurality of output ports connected to a plurality of “destination” network elements.
The switch includes buffers to temporarily store packets, due, for example, to temporary oversubscription and/or Quality of Service (QoS) requirements. Ideally, the switching device should employ a fully output buffered architecture, which may ensure work conserving operation, while placing no limit on, and simplifying the implementation of, packet scheduling mechanism per output.
However, a fully output buffered architecture may not be practical, e.g., for mid to high capacity switches. In such cases, a fabric-based architecture may be used, in which a plurality of input controllers are interconnected to a plurality of output controllers by a fabric, wherein each input/output controller may support a plurality of input/output ports. The interconnecting fabric is preferably non-blocking Some examples of a non-blocking fabric include a crossbar, buffered-crossbar, and shared memory buffered fabric.
Some fabrics may be self-routing, whereby routing information is attached to, or is associated with, the data packet or cell that is transported across the fabric. Self-routing fabrics may include, for example, buffered fabric or Ethernet switches.
Since a single physical fabric device may not have the capacity to support the entire capacity of the switching device, in some implementations, a fabric may be implemented using several physical devices. For example, striping of data across multiple devices may be implied to build a fabric from multiple physical devices.
Switching devices implementing a fabric-based architecture may have a constraint on the bandwidth that an input port may transmit to the fabric, on the bandwidth that an output port may receive from the fabric, and/or on the bandwidth that the fabric may transport from the input to the output. This constraint is typically measured by a quantity called “speedup”. A speedup of N may relate to a symmetrical non-blocking fabric arrangement whereby an input/output controller receives/transmits from/to the source/destination network elements a maximum bandwidth normalized to 1, and transmits/receives to/from the non-blocking fabric a maximum bandwidth of N. A minimal speedup of 1 is required for a switching mechanism employing such an architecture to be work conserving. A switching device with speedup of M, wherein M is equal to the number of input controllers, is equivalent to an output queued switch.
If the speedup is smaller than M, a buffer may be required at the input controller. The buffer of the input controller may be organized into a plurality of Virtual Output Queues (VOQs), e.g., in order to prevent head of line blocking, to enable efficient fabric operation, and/or to simplify QoS implementation. The VOQ may include a queue in which all packets are destined to one output controller and, possibly, to one or more output ports of the output controller.
A buffer is also required at the output controller, e.g., in order to adapt the rate of traffic from the fabric to the rate of traffic transmitted to the output ports, if, for example, the switching device has a speedup greater than 1.
The typical buffered fabric architecture employs a QoS aware fabric. Due to the complexity and cost of implementation, the buffered fabric may typically implement buffering only per output controller and traffic class.
The fabric-based architecture may have a scheduling mechanism to coordinate and manage the transport of data from the VOQs, through the fabric, and to the output controllers and output controller ports, in accordance with predefined performance goals of the switching device. Systems employing QoS related scheduling in the fabric layer may be inefficient and may require a complex buffered fabric and high speedup for consistent data flow.
The switching devices described above may require a relatively high speedup, relatively complex fabric architectures, and/or large buffers at the output controllers, in order to provide efficient data flow and/or high QoS guarantees for data transport.